ARCHSIMS

FOUR WEBER DIDACTIC CPUs · FRONT PANELS · IN THE BROWSER

MEMBRANE SERIES
PROGRESSION
NEANDER AHMES RAMSES CESAR
  1. NEANDER AP-1971

    8-bit accumulator — the starting point.

    WIDTH
    8 bit
    OPCODES
    11
    MEMORY
    256 B

    One accumulator, three flags, 11 opcodes. The simplest Weber machine — made to teach fetch / decode / execute.

  2. AHMES AP-1973

    Neander, extended — shifts, rotates, arithmetic.

    WIDTH
    8 bit
    OPCODES
    24
    FLAGS
    N Z V C B

    Adds carry, borrow, overflow, unsigned compares, and bit-shift instructions. Still one accumulator, still 256 bytes.

  3. RAMSES AP-1985

    Three registers, four addressing modes.

    WIDTH
    8 bit
    REGS
    RA · RB · RX
    MODES
    4

    RA / RB / RX, immediate / direct / indirect / indexed. Introduces JSR self-linking and real operand encoding in the IR.

  4. CESAR AP-1991

    16-bit, eight registers, 64 KiB, memory-mapped I/O.

    WIDTH
    16 bit
    MEMORY
    64 KiB
    MODES
    8

    Eight 16-bit registers (R6=SP, R7=PC), eight addressing modes, display + keyboard at the top of memory. The family's flagship.